1. Field of the Invention
The invention relates generally to the detection of electrical overstress events in electronic devices, and more particularly to determination of the cause of overstress and determination of reliability degradation.
2. Background
Advances in semiconductor manufacturing technology have led to the integration of tens, and more recently hundreds, of millions of circuit elements, such as transistors, on a single integrated circuit (IC). To achieve such dramatic increases in the density of circuit components has required semiconductor manufacturers to scale down the physical dimensions of the circuit elements, as well as the interconnection structures used to connect the circuit elements into functional circuitry.
One consequence of scaling down the physical dimensions of circuit elements and interconnect structures is an increased sensitivity to electrical overstresses. This sensitivity is problematic because it reduces noise margins, and requires careful engineering of power supplies and clock signal generators. Additionally, because integrated circuits such as, for example, microprocessors, are worth more to consumers as their operating frequency increases, there is a growing tendency to overclock, or otherwise overstress such integrated circuits to obtain higher levels of performance. Voltage and frequency skewing by end users tends to cause a voltage overstress in the integrated circuit. Such skewing may also be referred to by terms such as overpowering and overclocking. Overstresses of this type may result in the operational failure of such an integrated circuit.
What is needed are methods and apparatus for determining if an integrated circuit has been subjected to overstress.